
5
4109LS–8051–02/08
AT8xC51SND1C
Figure 4-3.
AT8xC51SND1C 84-pin PLCC Package
4.2
Signals
All the AT8xC51SND1C signals are detailed by functionality in
Table 1 to
Table 14.Table 1. Ports Signal Description
AT89C51SND1C-SR (FLASH)
P
0
.3
/A
D
3
P
0
.4
/A
D
4
P
0
.5
/A
D
5
V
S
V
D
P
0
.6
/A
D
6
P
0
.7
/A
D
7
P
2
.0
/A
8
P
2
.1
/A
9
P
3
.3
/I
N
T
1
P
3
.4
/T
0
P
3
.5
/T
1
P
3
.6
/W
R
P
3
.2
/I
N
T
0
65
64
63
62
61
60
59
58
55
56
57
12
13
14
15
16
17
22
20
19
3
4
3
5
3
6
3
7
4
3
2
1
8
4
8
3
8
2
8
1
8
0
7
9
7
8
NC
P2.3/A11
P2.4/A12
P2.6/A14
P2.5/A13
P2.7/A15
MCLK
MDAT
MCMD
P
0
.2
/A
D
2
P
0
.1
/A
D
1
P
5
.0
PAVSS
VSS
X2
NC
X1
P
3
.1
/T
X
D
18
21
23
24
25
3
8
3
9
4
0
4
1
4
2
69
68
67
66
70
5
6
7
8
9
P
4
.3
/S
S
P
4
.2
/S
C
K
P
4
.1
/M
O
S
I
P
4
.0
/M
IS
O
VSS
VDD
RST
SCLK
DSEL
DCLK
DOUT
A
IN
1
A
IN
0
A
R
E
F
N
A
R
E
F
P
A
V
S
A
V
D
V
S
V
D
P
3
.7
/R
D
P
3
.0
/R
X
D
P1.0/KIN0
P1.1/KIN1
P1.2/KIN2
P1.3/KIN3
P1.4
P1.5
P1.7/SDA
FILT
PAVDD
VDD
P1.6/SCL
26
4
3
TST
P
5
.2
P
0
.0
/A
D
0
7
P2.2/A10
54
ALE
ISP
N
C
P
5
.1
P
4
.7
P
4
.6
7
6
7
5
1
0
1
28
27
29
30
31
32
UVDD
UVSS
4
5
4
6
4
7
4
8
4
9
5
0
5
1
5
2
5
3
74
73
72
71
P4.4
P4.5
VDD
VSS
D
-
D
+
N
C
P
5
.3
Signal
Name
Type
Description
Alternate
Function
P0.7:0
I/O
Port 0
P0 is an 8-bit open-drain bidirectional I/O port. Port 0 pins that have 1s
written to them float and can be used as high impedance inputs. To
avoid any parasitic current consumption, floating P0 inputs must be
polarized to V
DD or VSS.
AD7:0
P1.7:0
I/O
Port 1
P1 is an 8-bit bidirectional I/O port with internal pull-ups.
KIN3:0
SCL
SDA
P2.7:0
I/O
Port 2
P2 is an 8-bit bidirectional I/O port with internal pull-ups.
A15:8